Jiayi Huang (黄嘉逸)
Jiayi Huang (黄嘉逸)
Assistant Professor
Microelectronics Thrust
Function Hub, HKUST(GZ)
Rm 606, W1
1 Duxue Rd, Nansha District
Guangzhou, 510000, China
Email: jiayi.huang [at] ust.hk
About me
I am an Assistant Professor in the Microelectronics Thrust at the Hong Kong University of Science and Technology (Guangzhou). Prior to joing HKUST(GZ), I was a research scientist at Alibaba DAMO Academy. I was a postdoc with the SEAL lab at UC Santa Barbara, supervised by Dr. Yuan Xie and Dr. Yufei Ding. I received my Ph.D. in Computer Engineering from Texas A&M University, where I was advised by Dr. EJ Kim, and my B.Eng. from Zhejiang University.
My research interests lie in the fields of computer architecture and systems, with a special focus on data movement optimization for communication/data-centric and heterogeneous architecture, as well as the interplay of machine learning and system design. My dissertation focuses on specializing interconnects to accelerate emerging applications.
I am committed to training the next-generation computer architects. I am seeking students who are passionate about defining new computer architectures to solve challenging computing problems. If you are interested, please email me (jiayi.huang [at] ust.hk) with your CV and transcript (more info: EN, CN).
Publications [Google Scholar] [DBLP] [ORCID]
WHISTLE: CPU Abstractions for Hardware and Software Memory Safety Invariants
Sungkeun Kim, Farabi Mahmud, Jiayi Huang, Pritam Majumder, Chia-Che Tsai, Abdullah Muzahid, EJ Kim
IEEE Tranactions on Computers. (Accepted)
MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures
Xinfeng Xie, Peng Gu, Jiayi Huang, Yufei Ding, Yuan Xie
IEEE Computer Architecture Letters (CAL), 21(1):1—4, January—June 2022.
[paper] [link] [bibtex] [code]
RVDFI: A RISC-V Architecture with Security Enforcement by High Performance Complete Data-Flow Integrity
Lang Feng*, Jiayi Huang*, Luyi Li, Haochen Zhang, Zhongfeng Wang
IEEE Tranactions on Computers, 71(10):2499—2512, October 2022.
Toward Taming the Overhead Monster for Data-Flow Integrity
Lang Feng, Jiayi Huang, Jeff Huang, Jiang Hu
ACM Transactions on Design Automation of Electronic Systems (TODAES), 27(3):1—24, May 2022.
Prefender: Prefetching Defender against Cache Side Channel Attacks as A Pretender
Luyi Li, Jiayi Huang, Lang Feng, and Zhongfeng Wang
Design, Automation and Test in Europe Conference (DATE), March 2022.
Best Paper Award Nominee
Communication Algorithm-Architecture Co-Design for Distributed Deep Learning
Jiayi Huang, Pritam Majumder, Sungkeun Kim, Abdullah Muzahid, Ki Hwan Yum, and Eun Jung Kim
International Symposium on Computer Architecture (ISCA), June 2021.
[paper] [link] [bibtex] [slides] [lightning] [poster] [example]
A Voting Approach for Adaptive Network-on-Chip Power-Gating
Jiayi Huang, Shilpa Bhosekar, Rahul Boyapati, Ningyuan Wang, Byul Hur, Ki Hwan Yum, and Eun Jung Kim
IEEE Transactions on Computers, 70(11):1962—1975, 2021.
[paper] [link] [bibtex] [code]
Remote Control: A Simple Deadlock Avoidance Scheme for Modular Systems-on-Chip
Pritam Majumder, Sungkeun Kim, Jiayi Huang, Ki Hwan Yum, and Eun Jung Kim
IEEE Transactions on Computers, 70(11):1928—1941, 2021.
Computing En-Route for Near-Data Processing
Jiayi Huang, Pritam Majumder, Sungkeun Kim, Troy Fulton, Ramprakash Reddy Puli, Ki Hwan Yum, and Eun Jung Kim
IEEE Transactions on Computers, 70(6):906—921, 2021.
[paper] [link] [bibtex] [code]
ReViCe: Reusing Victim Cache to Prevent Speculative Cache Leakage
Sungkeun Kim, Farabi Mahmud, Jiayi Huang, Pritam Majumder, Neophytos Christou, Abdullah Muzahid, Chia-Che Tsai, and Eun Jung Kim
IEEE Security Development Conference (SecDev), September 2020.
[paper] [link] [slides] [bibtex]
Active-Routing: Compute on the Way for Near-Data Processing
Jiayi Huang, Ramprakash Reddy Puli, Pritam Majumder, Sungkeun Kim, Rahul Boyapati, Ki Hwan Yum, and Eun Jung Kim
International Symposium on High Performance Computer Architecture (HPCA) , February 2019.
[paper] [link] [slides] [lightning] [bibtex] [code]
Approx-NoC: A Data Approximation Framework for Network-On-Chip Architectures
Rahul Boyapati, Jiayi Huang, Pritam Majumder, Ki Hwan Yum, and Eun Jung Kim
International Symposium on Computer Architecture (ISCA) , July 2017.
[paper] [link] [slides] [lightning] [bibtex] [benchmarks]
Packet Coalescing Exploiting Data Redundancy in GPGPU Architectures
Kyung Hoon Kim, Rahul Boyapati, Jiayi Huang, Yuho Jin, Ki Hwan Yum, and Eun Jung Kim
International Conference on Supercomputing (ICS), June 2017.
Fly-Over: A Light-Weight Distributed Power-Gating Mechanism for Energy-Efficient Networks-on-Chip
Rahul Boyapati*, Jiayi Huang*, Ningyuan Wang, Kyung Hoon Kim, Ki Hwan Yum, and Eun Jung Kim
International Parallel & Distributed Processing Symposium (IPDPS), May-June 2017.
[paper] [link] [slides] [bibtex] [code]
Poster and Preprints
Coloring Big Graphs with AlphaGoZero
Jiayi Huang, Mostofa Patwary, Gregory Diamos
arXiv preprint arXiv:1902.10162, 2019.
Fly-Over: A Light-Weight Distributed Power-Gating Mechanism for Energy-Efficient Networks-on-Chip
Rahul Boyapati*, Jiayi Huang*,
Ningyuan Wang, Kyung Hoon Kim, Ki Hwan Yum, and Eun Jung Kim
International Conference on Parallel Architectures and Compilatin Techniques (PACT), September 2016.
Experiences
Computing Technology Lab, Alibaba DAMO
Academy, Research Scientist,
May 2022 — January 2023
University of California, Santa Barbara, Postdoctoral Researcher,
October 2021 — May 2022
Baidu Research - Silicon Valley AI Lab,
Systems Research Intern,
September 2018 — December 2018
- Researched on reinforcement learning for combinatorial
and systems optimization
- Coloring big graphs with AlphaZero
[arXiv]
[media]
Tesla,
Performance Engineer Intern,
May 2018 — August 2018
- Architected memory controller of Autopilot Hardware
Teaching
MICS6000L Computer Architecture, Spring 2023
Talks
Interconnect Specialization for Addressing Data Movement Inefficiencies
Computing Technology Lab, Alibaba DAMO Academy, March 2022
Michigan Technological University, March 2022
University of Rochester, March 2022
The College of William & Mary, March 2022
George Mason University, Feburary 2022
University of Rhode Island, Feburary 2022
Washington State University, January 2022
The Hong Kong University of Science and Technology (Guangzhou), January 2022
RVDFI: A RISC-V Based Data-Flow Integrity Enforcement System
Computing Technology Lab, Alibaba DAMO Academy, Virtual, Feburary 2022
Communication Algorithm-Architecture Co-Design for Distributed Deep Learning
@ ISCA-48, Virtual, June 2021
[slides]
@ NSF Workshop on Machine Learning Hardware — Posters, Virtual, November 2020
[poster]
[video]
Interconnect Specialization for Big Data and Machine Learning
Department of Computer Science and Statistics, University of Rhode Island, Virtual, June 2020
Active-Routing
@ Xia Peisu Forum, ICT, CAS, Virtual, September 2020
[slides-chinese]
@ ARM Research Summit, Austin, USA, September 2019
[slides]
@ HPCA-25, Washington D.C., USA, February 2019
[slides]
Approx-NoC
@ ISCA-44, Toronto, Canada, June 2017
[slides]
Fly-Over
@ IPDPS, Orlando, USA, May 2017
[slides]
@ PACT Poster Session, Haifa, Israel, September 2016
[poster]
Acknowledgements: Travel Grants from PACT'16, IPDPS'17, ISCA'17, HPCA'19, NSF and CSE@TAMU
Honors and Awards
Dissertation Fellowship, Texas A&M University, Fall 2019 — Summer 2020
Second Prize in the Seventh Supcon Cup Robot Competition, Zhejiang University, May 2012 [robot]
Services
Program Committee:
NAS 2021, ASAP 2021, ICCD 2021, ICCD 2022, DAC 2022, DAC 2023
External Reviewer:
ICPP 2022
Subreviewer:
HPCA 2021
Journal Reviewer:
IEEE Computer Architecture Letters (CAL), 2016.
IEEE Transactions on Computers (TC), 2019 — 2022.
ACM Transactions on Architecture and Code Optimization (TACO), 2021.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020 — 2022.
Co-Organizer of TAMU CSE System Seminar 2019 — 2020 (with
Dilma Da Silva and
Chia-Che Tsai)
Member of ACM (SIGARCH, SIGMICRO)
Member of IEEE Computer Society
Member of China Computer Federation
(CCF)